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A quasi two dimensional model is developed for a fully depleted (FD) double gate Silicon on Insulator (SOI) Metal Oxide Semiconductor (MOS) Transistors for the strong inversion regime. Front and back gate effects are accounted for. Small geometry effects such as carrier velocity saturation, mobility degradation, and channel length modulation effects are included. Lattice and carriers are considered to be at thermal equilibrium. The thermal effects are included in carrier mobility, threshold voltage, and intrinsic concentration. IN characteristics in the saturation region include the effects of impact ionization current and parasitic bipolar transistor.
Date of Conference: 2 April 2004