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This paper presents a direct digital frequency synthesizer (DDFS) which uses a series of piece-wise polynomial segments to approximate the sine function. It is shown that using multiple polynomial segments can reduce the required polynomial order, for a given output precision. Simulation and hardware complexity results are presented for a selection of DDFS circuits using this technique. It is found that piece-wise polynomial based DDFS architectures achieve a spurious-free dynamic range (SFDR) performance superior to leading examples in the literature.