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The evolution of radio-communication systems to third generation based on the WCDMA technique leads to an increase of the digital signal processing complexity. Due to their flexibility, high-performance DSP processors are good candidates for the platform used in radio-communication infrastructures. In this paper, an efficient implementation of a WCDMA rake receiver on the Texas Instrument TMS320C64x VLIW DSP is proposed. For minimizing the code execution time, the optimization techniques based on the exploitation of the data and instruction-level parallelism are presented.