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Fully integrated low power phase-locked loop for various inputs in sensor network applications

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2 Author(s)
Gan, J. ; Cirrus Logic Inc., Austin, TX, USA ; Abraham, J.

A fully integrated low power phase-locked loop that locks to normal clocks and Manchester encoded data streams of different frequencies is presented. It can be used in various sensor network applications for clock recovery and synchronization between sensor nodes. The inputs to the phase and frequency detector can be normal clock or Manchester encoded data stream of 1,2, or 4 MHz. The on-chip loop filter can perform the filtering for different input frequencies. The output frequency is 32 MHz. The jitter is 300 ps and the power consumption is 3 mW at 3 V power supply.

Published in:

Signals, Systems and Computers, 2004. Conference Record of the Thirty-Seventh Asilomar Conference on  (Volume:2 )

Date of Conference:

9-12 Nov. 2003