A supervised neural network layer of continuously adapting, analog floating-gate nodes

We present an LMS node based upon an improved continuously adapting, analog floating-gate synapse that exhibits minimal weight decay. Our approach is based upon a recently developed synapse element based upon our tradition on single-transistor learning synapses with minimal weight decay. We show the transition from a single floating-gate synapse element to a single floating-gate node, demonstrated using results from simple LMS experiments. We present experimental data from ICs fabricated in 0.5 /spl mu/m CMOS process.