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Optimum DMOS cell doping profiles for high-voltage discrete and integrated device technologies

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1 Author(s)
K. Shenai ; General Electric Corp. Res. & Dev. Center, Schenectady, NY, USA

It is shown that the implementation and activation sequences of B and As result in significant variations in the contact resistance and p-base sheet resistance beneath the n+-source diffusion of a DMOSFET cell. For identical process parameters, the contact resistance of As-doped n+ silicon was significantly improved when high-dose B was implanted due to higher As surface concentration. The SUPREM III process modeling results were found to be in qualitative agreement with the measured spreading resistance profiles and the discrepancies could be attributed to larger high-temperature diffusion constants used in SUPREM III and the coupled As-B diffusion/activation effects that are not accounted for in process modeling. The experimental results are discussed within the framework of fabricating high-performance DMOSFET cells and CMOS high-voltage devices on the same chip for discrete and smart-power applications

Published in:

IEEE Transactions on Electron Devices  (Volume:39 ,  Issue: 5 )