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A high-density, self-aligned power MOSFET structure fabricated using sacrificial spacer technology

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1 Author(s)
Shenai, K. ; General Electric Corp. Res. & Dev. Center, Schenectady, NY, USA

A novel power MOSFET structure fabricated using sacrificial spacer technology is described. Anisotropically etched sidewall oxide spacers were used to implement self-aligned shallow p+ surface diffused regions to reduce the p-base sheet resistance and its contact resistance. Vertical power DMOSFETs with VDB=150 V and Rsp=9.7 mΩ-cm2 were fabricated using this technology, where VDB is the drain-source avalanche breakdown voltage and Rsp is the specific on-state resistance. The measured on-state resistance performance is a factor of 4 times smaller compared to commercially available power MOSFETs in the 150-V reverse blocking range

Published in:

Electron Devices, IEEE Transactions on  (Volume:39 ,  Issue: 5 )

Date of Publication:

May 1992

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