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The implementation and characterization of a high sensitivity silicon-on-insulator (SOI) capacitive microaccelerometer with sub-25 μg resolution is presented. The in-plane accelerometers were fabricated on 40 μm thick SOI substrates using a two-mask, dry-release low temperature process comprising of three plasma etching steps. The fabricated devices were interfaced with a high resolution, low noise and low power switched-capacitor integrated circuit (IC) fabricated in a 2.5 V 0.25 μm N-well CMOS process. The measured sensitivity is 0.2 pF/g and the output noise floor is 20 μg/√Hz. The total power consumption is 3 mW.
Date of Conference: 2004