By Topic

Prospects for WSI: a manufacturing perspective

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Maly, W. ; Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

A manufacturing cost model that describes the relationships among characteristics of modern manufacturing processes, investment costs to achieve these characteristics, and basic IC parameters, including both die size and minimum feature size, is used to explain major trends in the past 20 yr of microelectronics. Results from this model indicate that it is not possible to continue progress in microelectronics through minimizing feature size, that the drive toward larger dies will gain momentum and lead gradually toward wafer-scale integration (WSI), and that manufacturing costs will keep WSI from becoming practical in the immediate future. Active-substrate flip-chip multichip modules (MCMs) are presented as an alternative that may provide both the performance gain and cost efficiency required.<>

Published in:

Computer  (Volume:25 ,  Issue: 4 )