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Real-time packet switching: a performance analysis

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4 Author(s)
Cidon, I. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Gopal, I. ; Grover, G. ; Sidi, M.

The authors model the internal structure of a packet-switching node in a real-time system and characterize the tradeoff between throughput, delay, and packet loss as a function of the buffer size, switching speed, etc. They assume a simple shared-single-path switch fabric, though the analysis can be generalized to a wider class of switch fabrics. They show that with a small number of buffers the node will provide a guaranteed delay bound for high-priority traffic, a low average delay for low-priority traffic, no loss of packets at the input and low probability of packet loss at output.<>

Published in:

Selected Areas in Communications, IEEE Journal on  (Volume:6 ,  Issue: 9 )

Date of Publication:

Dec. 1988

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