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A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis

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5 Author(s)
I. M. Elfadel ; IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA ; A. Deutsch ; H. H. Smith ; B. J. Rubin
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This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extraction problem into one of per-unit-length parameter extraction. This methodology has been embodied in a CAD tool that is now in production use by interconnect designers and complementary metal oxide semiconductor (CMOS) process technologists.

Published in:

IEEE Transactions on Advanced Packaging  (Volume:27 ,  Issue: 1 )