Cart (Loading....) | Create Account
Close category search window
 

High-speed system bus for a SoC network processing platform

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Bissou, J.P. ; Dept. of Electr. Eng., Ecole Polytech. Montreal, Que., Canada ; Dubois, M. ; Savaria, Y. ; Bois, G.

Interconnecting modules in a SoC platform requires modules compatibility. Several solutions are available, but they either lack the necessary throughput or the flexibility. This paper proposes an interconnection architecture for a flexible on-chip high-performance communication medium that can provide variable bandwidth. It is based on the AHB AMBA bus. The proposed architecture has been implemented in the Seamless environment and laid out using a 0.18 μm CMOS with Cadence tools to validate the proposed concept.

Published in:

Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on

Date of Conference:

9-11 Dec. 2003

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.