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An integrated approach for analog circuit testing using autocorrelation analysis, singular value decomposition and probabilistic neural network

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1 Author(s)
Abu El-Yazeed, M.F. ; Dept. of Electron. & Commun., Cairo Univ., Giza, Egypt

This paper presents an automated approach for the detection and isolation of soft and hard faults in analog electronic circuits. It studies the ability to combine autocorrelation analysis as a preprocessor, singular value decomposition (SVD) for dimensionality reduction, and probabilistic neural network (PNN) as a classifier. The potential of the algorithm demonstrated by two active circuit examples. The first example simulates soft faults while the second example simulates hard faults. Classification results are found comparable to those obtained when the traditional wavelet and Fourier transforms (FT) are utilized as preprocessors.

Published in:

Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on

Date of Conference:

9-11 Dec. 2003