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Three and four-dimensional parity-check codes for correction and detection of multiple errors

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3 Author(s)
Anne, N.B. ; Dept. of Electr. & Comput. Eng., Nevada Univ., Las Vegas, NV, USA ; Utthaman Thirunavukkarasu ; Latifi, S.

We examine two different schemes of three dimensional parity checking codes that can be obtained by arranging the information and parity bits as a combination of rows and columns or by arranging them as two dimensional planes to obtain a three dimensional cube. Finding the number of errors detected and the numbers of errors corrected has been the main aim of this work. The code rate and the overhead of each scheme has been calculated and compared with that of the standard parity schemes available. Some general equations have been derived to represent these families of codes. A four dimensional scheme that can detect and correct more multiple errors has also been discussed.

Published in:

Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004. International Conference on  (Volume:2 )

Date of Conference:

5-7 April 2004

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