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We consider in this paper the encoding problem for low-density parity-check (LDPC) code. We investigate an efficient encoding approach for LDPC code. The straightforward the existing encoding scheme for LDPC code usually incurs too high complexity and should be changed to encoding scheme with low complexity. However, little consideration has been given to the LDPC encoder VLSI implementation. We consider low complexity encoding of regular LDPC code, and we propose a pivoting and bit-reverse (PABR) algorithm to rapidly construct parity-check matrix for regular LDPC code. The code have sparse parity-check matrix. They are designed to perform well when iteratively decoded with the sum-product decoding algorithm and to allow low complexity encoding. Performance is superior to that of cyclic regular LDPC code can be achieved. We show approach to implementing LDPC encoder using PABR algorithm. This paper then describes FPGA implementation of regular LDPC encoder on hardware platform for 4th mobile communication system.