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A unified global and local interconnect test scheme for Xilinx XC4000 FPGAs

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2 Author(s)
Xiaoling Sun ; Dept. of Electr. & Comput. Eng., Univ. of Alberta, Edmonton, Alta., Canada ; Trouborst, P.

This paper presents a unified global and local interconnect testing scheme for field programmable gate arrays. Adjacency graphs are used to model interconnect resources and their test requirements, and an efficient computer algorithm for automatic derivation of test configurations is given. A device configuration generation tool was developed to reduce the test development cost.

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Instrumentation and Measurement, IEEE Transactions on  (Volume:53 ,  Issue: 2 )