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Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes

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2 Author(s)
Ming-Dou Ker ; Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Wen-Yi Chen

Although the gate-driven (or gate-coupled) technique was reported to improve ESD robustness of NMOS devices, the over-gate-driven effect has been found to degrade the ESD level. This effect makes the gate-driven technique difficult to be well optimized in deep-submicron CMOS ICs. In this work, a new design is proposed to overcome such over-gate-driven effect by circuit design and to achieve the maximum ESD capability of the devices. The experimental results have shown significant improvement on the machine-model (MM) ESD robustness of ESD protection circuits by this new proposed design. This new design is portable (process-migration) for applications in different CMOS processes without modifying the process step or mask layer.

Published in:

Quality Electronic Design, 2004. Proceedings. 5th International Symposium on

Date of Conference:

2004