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Analysis of low-dropout regulator topologies for low-voltage regulation

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3 Author(s)
Sai Kit Lau ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China ; Ka Nang Leung ; P. K. T. Mok

The design considerations of integrated CMOS low-voltage low-dropout regulators are addressed in this paper. The limitations of a generic LDO based on dominant-pole compensation are discussed. Then, LDO with a voltage-buffer stage and the corresponding problems in low-voltage design are discussed. Finally, an advanced compensation technique based on nested Miller compensation for achieving high performances is presented.

Published in:

Electron Devices and Solid-State Circuits, 2003 IEEE Conference on

Date of Conference:

16-18 Dec. 2003