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In many modern power electronics applications, it is desired to package the power switches tightly with their control and driving circuitry in order to reduce the size. Thermal management, therefore, has become an important issue. Minimization of the case-to-ambient thermal resistance RθCA is a crucial measure for high-density power packaging. In this paper, electrical models were established for typical layouts to illustrate the heat transfer paths on the 2-layer and 4-layer printed circuit boards (PCBs). Trends of the thermal resistance change according to the variation of layout patterns are presented and verified by a series of experiments, which provides engineers with design guidelines for optimizing PCB layouts.