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The reliability and optimum result of P/G nets routing method can affect area optimization and electricity performance of whole CMOS chip. Based on the analysis of noise uniform distribution and reliability of module operation, in this paper, we present a synchronizing method for optimum design of power and ground topology. Experimental results demonstrate the better characteristic of noise uniform distribution and operating reliability.
ASIC, 2003. Proceedings. 5th International Conference on (Volume:1 )
Date of Conference: 21-24 Oct. 2003