Abstractions and primitives enabling runtime resource allocation for dynamic IP cores using virtual platform FPGAs

The platform approach to hardware design was originally suggested as a method of broadening the domain of applications a custom VLSI chip can be applied to by introducing additional programmability. In this paper we extend the idea of platform design with the objective broadening the range of applications of FPGAs by making runtime resource allocation available for FPGAs that do not support run time reconfiguration natively. We explore this approach by constructing a virtual platform FPGA; that is a reconfigurable platform implemented on top of a native FPGA. The paper gives an overview of the application programmer's interface of our proposed virtual platform and some of the communication primitives that we have implemented to construct the virtual platform. We note that there is a need for more work in identifying computation primitives for a virtual platform that strike a balance between supporting useful abstractions and having efficient implementations on typical native FPGAs.