Referenced Items are not available for this document.
The hot-carrier degradation behavior of both a lateral and a vertical integrated DMOS transistor is investigated in detail by the analysis of the electrical data, charge pumping measurements and two-dimensional device simulations. Upon hot-carrier stress, two different, and competing degradation mechanisms are present: channel electron mobility reduction due to interface trap formation, and injection and trapping of hot holes in the accumulation region of the transistor. It will be shown that the latter mechanism is absent in the vertical DMOS.
Published in:
Electron Devices, IEEE Transactions on
(Volume:51
,
Issue:
4
)
Date of Publication: April 2004
- Page(s):
- 623 - 628
- ISSN :
- 0018-9383
- INSPEC Accession Number:
- 7974551
- Digital Object Identifier :
- 10.1109/TED.2004.824688
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 22 March 2004
- Issue Date :
- April 2004
- Sponsored by :
- IEEE Electron Devices Society
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