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A CMOS power amplifier with a novel output structure

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1 Author(s)
Qiuting, H. ; Sch. of Inf. Syst., East Anglia Univ., Norwich, UK

A two-stage op-amp with a novel output driver achieves 5.8-MHz GBW, 68° phase margin, and delivers 2.6 Vpp with a THD of 0.14% and 3.2 Vpp with a THD of 0.38% into 100 Ω at 20 kHz for a ±2.5-V supply. The output driver enables a very simple circuit measuring only 0.11 mm2

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:27 ,  Issue: 2 )