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A Parallel Simulated Annealing Algorithm for the Placement of Macro-Cells

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3 Author(s)
Casotto, A. ; Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA, USA ; Romeo, F. ; Sangiovanni-Vincentelli, A.

A modification of the classical Simulated Annealing algorithm for the macro-cell placement problem is proposed for implementation on multiprocessor systems. The algorithm has been implemented on the Sequent Balance 8000, a multiprocessor system with a shared-memory architecture. Experimental results show that the new algorithm obtains results comparable in quality to those of the single processor version; processor utilization is greater than 80 percent using up to eight processors.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:6 ,  Issue: 5 )