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Compaction-Based Custom LSI Layout Design Method

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4 Author(s)
Ishikawa, M. ; C & C Systems Research Laboratories, NEC Corporation, Kawasaki, Japan ; Matsuda, T. ; Yoshimura, T. ; Goto, S.

This paper presents a new design method for custom LSI layouts. This method is based on layout compaction with automatic jog (wiring bend) generation in the layout. A dense chip design can be realized by this technique. Experimental results show that the chip size designed by using the proposed layout method is only 1.2-1.4 times larger than that resulting from manual layouts. Therefore, this compaction-based custom LSI layout design method is very effective for achieving a minimal chip layout design.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:6 ,  Issue: 3 )