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On the Repair of Redundant RAM's

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2 Author(s)
Chin-Long Wey ; Department of Electrical Engineering and Systems Science, Michigan State University, East Lansing, MI, USA ; F. Lombardi

This paper describes a set of novel conditions that can be integrated in a computer-aided-testing (CAT) package for repair of redundant RAM's. A new approach is proposed; the innovative feature of this approach is the independence of analysis on the distribution of faulty bits in memory. This results in better exploitation of redundancy and efficient adaptability of this technique to various testing methods, such as the ones that employ region totalizers and fault counters. Algorithms that provide repair solution and earliest detection of unrepairability of a device are presented. The benefits that result by using this approach include a reduction in repair time. Conditions of unrepairability are given as a function of the number of spare resources (columns and rows) in the redundant memory; significant improvement over existing techniques is accomplished. Simulation results are provided to substantiate the validity of the proposed theory.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:6 ,  Issue: 2 )