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This paper describes a new algorithm and some applications of an outline procedure for LSI mask patterns. The outline procedure, which extracts the outline of designed primitive shapes, is required in pattern data preparation for electron-beam (e-beam) writing. A novel algorithm is developed to extract the outlines of patterns from a large number of designed shapes within a whole chip area. The algorithm is able to extract the outline with no limit to the number of vertices in a reasonable time. A program in which the algorithm is implemented is able to compensate for some process biases and leads to a successful 1-Mbit DRAM e-beam fabrication. Some other related applications, such as proximity effect correction, are also presented.