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This paper describes the two-dimensional heterojunction device simulator MONTE. Drift-diffusion forms the basis for the transport of electrons and holes. Finite differences and Gummel's algorithm have been adopted to solve the coupled equations. Internal electrodes, capping dielectrics, recessed gates, Fermi-level pinning at the device surface, and deep traps in the substrate can all be treated. A heuristic approach has been devised for evaluating the mobility of electrons based on the quasi-Fermi level. Artifacts such as carrier heating in the built-in field are eliminated, but the model does underestimate electron mobility wherever overshoot occurs. Examples of simulation results on Fermi-level pinning, heterojunction Schottky diodes, a recessed gate MODFET, and a GaAs gate heterojunction FET will be presented.