By Topic

Symbolic Design of Combinational and Sequential Logic Circuits Implemented by Two-Level Logic Macros

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
De Micheli, G. ; IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA

This paper presents a method for the optimal synthesis of combinational and sequential circuits implemented by two-level logic macros, such as programmable logic arrays. Optimization consists of finding representations of switching functions corresponding to minimal-area implementations. The design of optimization is based on two steps: symbolic minimization and constrained encoding. Symbolic minimization yields an encoding-independent sum of products representation of a switching function which is minimal in the number of product terms. The minimal symbolic representation is then encoded into a compatible Boolean representation. The algorithms for symbolic minimization and the related encoding problems are described. The computer implementation and the experimental results are then presented.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:5 ,  Issue: 4 )