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FAUST: An MOS Fault Simulator with Timing Information

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3 Author(s)
Hsi-Ching Shih ; Department of Electrical and Computer Engineering and the Coordinated Science Laboratory, University of Illinois, Urbana, IL, USA ; Rahmeh, J.T. ; Abraham, J.A.

This paper describes FAUST, an MOS fault simulator with timing information. FAUST simulates the effects of realistic physical failures on MOS circuits and uses a static concurrent fault-simulation technique to evaluate the fault-free circuit and all the faulty circuits in one pass. FAUST produces voltage waveforms as well as logic tables with delay information for the fault-free circuit and for each of the faulty circuits.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:5 ,  Issue: 4 )

Date of Publication:

October 1986

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