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The customary need for rejection of candidate moves in simulated annealing is eliminated by biasing the selection of moves according to their effect on the cost function. An efficient implementation can offer a significant speed-up, though with increased memory. The logic partitioning problem is used as an illustration; both simple moves and pairwise interchanges are considered.
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on (Volume:5 , Issue: 1 )
Date of Publication: January 1986