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Stochastic Models for Wireability Analysis of Gate Arrays

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2 Author(s)
Sastry, S. ; Department of Electrical Engineering-Systems, University of Southern California, Los Angeles, CA, USA ; Parker, A.C.

A stochastic model for estimating measures of placement and routing on gate arrays is presented. Three important problems are addressed: estimating the dimensions of the routing channels, estimating the routability of a channel given the number of tracks, and determining the distribution and moments of wire lengths. In the context of wiring space estimation, exact and asymptotic formulas for the dimensions of routing channels are presented. Next, an expression for the probability that a routing channel with a given number of tracks will be routable is derived, and its asymptotic properties are examined. Finally, a model that characterizes the relationship between wire length distributions and partitioning of logic is developed. The model provides a firm mathematical basis for Rent's rule from which the distribution of wire lengths can be determined. That is, Rent's rule, or in general any similar relation, contains all the information about wire lengths. Based on this, estimates for the average wire length are derived. Numerical results from both simulated and real chips are presented.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:5 ,  Issue: 1 )