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A Method of Improving the Terminal Assignment in the Channel Routing for Gate Arrays

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1 Author(s)
Terai, M. ; LSI Research and Development Laboratory, Mitsubishi Electric Corporation, Itami, Japan

The channel router, which routes a rectangular channel with two rows of terminals along its top and bottom sides, is extensively used for the automatic routing of gate arrays. It is well known that in this routing method the routing can not be performed when the vertical constraint graph contains cycles. This paper deals with the problem of eliminating cycles in the vertical constraint graph by interchanging the nets assigned to logically equivalent terminals before channel routing. A heuristic algorithm is proposed for this problem. This algorithm yields a locally optimum assignment of nets to terminals, in the sense that the number of independent cycles in the vertical constraint graph of a resultant assignment can not be reduced by interchanging any pair of the nets assigned to logically equivalent terminals. Furthermore, in order to speed up the operation of this algorithm, it is shown that the checking as to whether or not the number of independent cycles in the vertical constraint graph is reduced can be done by noting only its subgraph, when a pair of nets assigned to logically equivalent terminals are interchanged. Experimental results have indicated that this proposed algorithm is efficient.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:4 ,  Issue: 3 )