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Browse Journals & Magazines > Computer-Aided Design of Inte ...> Volume:3 Issue:3 Help

An Unconstrained Topological Via Minimization Problem for Two-Layer Routing

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1 Author(s)
Marek-Sadowska, M. ; Department of Electrical Engineering and the Computer Sciences and the Electronics Research Laboratory, University of California, Berkeley, CA, USA

Based on graph theory, a study of via minimization problem is presented. We show that the simplest problem of this type is NP-complete and propose a heuristic algorithm for topological via minimization.

Published in:
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:3 ,  Issue: 3 )

Date of Publication: July 1984

Page(s):
184 - 190
ISSN :
0278-0070
Digital Object Identifier :
10.1109/TCAD.1984.1270074
Product Type:
Journals & Magazines
Date of Current Version :
03 March 2004
Issue Date :
July 1984
Sponsored by :
IEEE Council on Electronic Design Automation

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