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SPICE Modeling for Small Geometry MOSFET Circuits

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2 Author(s)
Ping Yang, B.S. ; VLSI Laboratory, Texas Instruments, Dallas, TX, USA ; Chatterjee, Pallab K.

VLSI circuit simulation requires computationally efficient MOSFET models. In this paper, VLSI circuit simulator models for the active device and some important passive devices are described. A quasi-physical short channel MOSFET current model is derived. This current model contains both above-threshold and subthreshold components. The values of the model parameter are extracted automatically from measured I-V data. The reduction in process information in this representation is shown to be tolerable using a proper quantization of the geometry and device type space. Narrow width effect is also included. A charge conserving MOSFET capacitor model is also given. The importance of the parasitic devices on VLSI circuit is shown and a model for the fringing capacitance due to finite gate thickness is introduced. A "process box" based on the statistical variation of parameters is extracted from a completely automated device characterization system. Experimental results indicate that the width and length are independent random variables. This statistical information allows the circuit response to be simulated across the process window.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:1 ,  Issue: 4 )