By Topic

An analytical integration method for the simulation of continuous-time ΔΣ modulators

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
G. G. E. Gielen ; Dept. of Electr. Eng., Katholieke Univ. Leuven, Leuven-Heverlee, Belgium ; K. Francken ; E. Martens ; M. Vogels

Circuit-level simulation of ΔΣ modulators is a time-consuming task, taking one or more days for meaningful results. While there are a great variety of techniques and tools that speed up the simulations for discrete-time ΔΣ modulators, there is no rigorous methodology implemented in a tool to efficiently simulate and design the continuous-time counterpart. Nevertheless, in today's low-power, high-accuracy and/or very high-speed demands for A-to-D converters, designers are often forced to resort to the use of continuous-time ΔΣ topologies. In this paper, we present a method for the high-level simulation of continuous-time ΔΣ modulators as needed in top-down design and high-level modulator optimization. The method is based on analytical integration using behavioral models and exhibits the best tradeoff between accuracy, speed, and extensibility in comparison with other possible techniques that are reviewed briefly in this work. This methodology has been implemented in a user-friendly tool. Nonidealities such as finite gain, finite GBW, output impedance, and also nonlinearities, such as clipping, harmonic distortion, and the important effect of jitter are modeled. Finally, the tool was used to carry out some design-relevant experiments, illustrating the straightforward way of obtaining and exploring design tradeoffs at the modulator architectural level.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:23 ,  Issue: 3 )