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A domain-specific cell based ASIC design methodology for digital signal processing applications

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6 Author(s)
Ren, B. ; Sch. of Eng., California Univ., Santa Cruz, CA, USA ; Wang, A. ; Bakshi, J. ; Liu, K.
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This paper proposes an innovative domain-specific cell based ASIC design flow to narrow the performance gap between the full custom ASIC design method and conventional standard-cell based ASIC design method. The flow can improve the design performance and still preserve the efficiency of the standard ASIC design flow. Targeting on digital signal processing applications, a domain-specific cell library is provided to augment of standard cell libraries. Experimental results of designing macros such as FFT, FIR etc. are shown in the paper. Based on this methodology a 64-tap FFT can achieve up to 24X performance improvement, with the power×delay×area (PDA) criteria, over the conventional designed ASICs.

Published in:

Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings  (Volume:3 )

Date of Conference:

16-20 Feb. 2004