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NeuroFPGA-implementing artificial neural networks on programmable logic devices

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5 Author(s)
Ferrer, D. ; Fac. de Ingenieria - UDELAR, Instituto. de Ingenieria Electr., Montevideo, Uruguay ; Gonzalez, R. ; Fleitas, R. ; Acle, J.P.
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An FPGA implementation of a multilayer perceptron neural network is presented. The system is parameterized both in network related aspects (e.g.: number of layers and number of neurons in each layer) and implementation parameters (e.g.: word width, pre-scaling factors and number of available multipliers). This allows to use the design for different network realizations, or to try different area-speed trade-offs simply by recompiling the design. Fixed point arithmetic with pre-scaling configurable in a per layer basis was used. The system was tested on an ARC-PCI board from altera™ several examples from different application domains were implemented showing the flexibility and ease of use of the obtained circuit. Even with the rather old board used, an appreciable speed-up was obtained compared with a software-only implementation based on Matlab neural network toolbox.

Published in:

Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings  (Volume:3 )

Date of Conference:

16-20 Feb. 2004

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