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Device properties in 90 nm and beyond and implications on circuit design

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12 Author(s)
C. H. Diaz ; Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan ; K. H. Fung ; S. M. Cheng ; K. L. Cheng
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To reconcile scaling-driven fundamental material limitations with industry evolution requirements, flexible CMOS technologies and tighter interaction between process development and circuit/system design are needed to efficiently realize Systems on a Chip (SoC). This paper discusses issues associated with power supply scaling, performance-leakage power optimization, gate dielectric scaling, strain-Si enhancement and I/O support.

Published in:

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Date of Conference:

8-10 Dec. 2003