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Architecture-level performance estimation for IP-based embedded systems

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4 Author(s)
Ueda, K. ; Graduate Sch. of Inf. Sci. & Technol., Osaka Univ., Japan ; Sakanushi, K. ; Takeuchi, Y. ; Imai, M.

In this paper, we propose a architecture-level performance estimation method for IP-based embedded systems using system-level profiling. Our method enables the performance estimation by the following procedures: 1) System-level profiling. 2) Automatic construction of the execution dependency graph (EDG) from the profile information. 3) Estimation of the system performance based on the EDG analysis. Our method enables fast performance estimation because it can estimate the performance of various architectures from the same system-level profile information. Experimental results show that our estimation method is about 10,000 times faster than the architecture-level simulations.

Published in:
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings  (Volume:2 )

Date of Conference: 16-20 Feb. 2004

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