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Read disturb-induced erase-state threshold voltage instability in a localized trapping storage Flash memory cell with a poly-silicon-oxide-nitride-oxide-silicon (SONOS) structure is investigated and reported. Our results show that positive trapped charge in bottom oxide generated during program/erase (P/E) cycles play a major role. Both gate voltage and drain voltage will accelerate the threshold voltage (Vt) drift. Hot-carrier caused disturb effect is more severe in a shorter gate length device at low temperature. A model of positive charge-assisted electron tunneling into a trapping nitride is proposed. Influence of channel doping on the Vt drift is studied. As the cell is in an "unbiased" storage mode, tunnel detrapping of positive oxide charges is responsible for the threshold voltage shift, which is insensitive to temperature.