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Exploiting the high-frequency performance of low-voltage low-power SC filters

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3 Author(s)
Aloisi, W. ; Dipt. di Ingegneria Elettrica Elettronica e dei Sistemi, Univ. Degli Studi di Catania, Italy ; Giustolisi, G. ; Palumbo, G.

This paper investigates the design of low-voltage low-power switched-capacitor (SC) filters for high-frequency applications by using the clock-booster approach. In particular, our proposed SC filter architecture uses single-ended double-sampling integrator cells based on low-voltage operational transconductance amplifiers which take advantage of dynamic biasing and the clock-booster technique to drive the switch transistors. To validate its high-frequency capability, two low-pass elliptic SC filters respectively with a corner frequency of 6 and 8-MHz, were designed in a 0.35-μm CMOS process. Both are suitable for telecom applications and can operate with a power supply as low as 1.5 V, while dissipating 11 mW. Measurements showed that for an output amplitude of 1 Vpp, their total harmonic distortions were maintained well below -40 dB in their bandwidths. Comparisons with other SC filter implementations in the literature, which highlight the quality of our implementation are also provided.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:51 ,  Issue: 2 )

Date of Publication:

Feb 2004

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