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A novel pole-zero compensation scheme using unbalanced differential pairs

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2 Author(s)
Ryan, A.P. ; Philips Res., Briarcliff Manor, NY, USA ; McCarthy, O.

The main problem in extending continuous-time filtering to higher frequencies is the sensitivity of high-frequency filters to analog integrator nonidealities such as finite dc gain and parasitic poles. The use of a cascode stage introduces internal nodes, and hence a nondominant pole, in the signal path. This has been overcome using a novel phase compensation scheme which does not require tuning of the compensating element, and is itself unaffected by tuning of the integrator's unity-gain frequency or quality factor. The scheme is based upon a MOS version of the "multi-tanh principle" where the linear range of a transconductor is divided between at least two unbalanced differential pairs operating in parallel. The common-source node of an unbalanced differential pair is not ac ground and the associated pole-zero pair may be harnessed to cancel the parasitic pole introduced by the cascode stage. The feasibility of the proposed design was evaluated with the fabrication of a test-chip on a 0.25 μm 2.5 V standard digital CMOS process. Measurements confirm that the group delay response is flat ( ±2%) over a five octave frequency range (3.5-112 MHz or 0.058-1.87fc).

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:51 ,  Issue: 2 )