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Accurate component modeling is a key factor to successful wireline and wireless circuit design in Si/SiGe BiCMOS and RF CMOS. This article presents the application of two planar electromagnetic simulation methods for reducing the memory and computation time requirement for accurate simulation of inductors fabricated with thick analog metal layers. First, a conformal subsectioning technique is briefly discussed in the context of reducing the numerical complexity of octagonal and circular spiral inductor analysis. Second, this article discusses a method for determining if more than a two-sheet model of thick metals is needed for accurate inductor simulation. Finally, the conformal mesh is applied to a 3.3-nH inductor fabricated using the IBM 0.13-μm RF CMOS process technology. The simulated and measured results are compared.