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Deadlock-free scheduling of photolithography equipment in semiconductor fabrication

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2 Author(s)
Hyun Joong Yoon ; Dept. of Mech. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; Doo Yong Lee

This paper presents the development of an efficient approach to the deadlock-free scheduling of photolithography equipment in semiconductor fabrication. Trends toward high automation and flexibility in the photolithography equipment accelerate the necessity of an intelligent scheduler that can guarantee reliability and improve the productivity of the photolithography equipment. Therefore, the scheduler of the photolithography equipment should be able to handle failures of process modules and deadlock while optimizing its performance measures such as throughput and utilization. The contingency of failure of process modules makes the tasks of optimizing the performance measures and managing deadlock more difficult because failure of process modules can change states unexpectedly and deadlock situations can vary dynamically according to failure of process modules. This paper proposes a deadlock-free scheduling approach that can perform scheduling and deadlock management in an efficient way for photolithography equipment, in spite of failures of process modules. First, this paper presents a novel framework in which the authors decompose the deadlock management problem into subproblems and then integrate them with scheduling algorithms. In other words, they identify deadlock-prone and deadlock-safe process modules in the context of the deadlock management and then focus on the deadlock-prone process modules to guarantee deadlock-freeness when applying scheduling algorithms to all of the process modules. To realize the proposed framework, a resource request matrix is introduced to represent operational states. The resource request matrix provides an explicit representation of the deadlock situations, which is useful in identifying deadlock-prone process modules and applying deadlock management algorithms. The authors also present algorithms of polynomial complexity to identify deadlock-prone process modules and algorithms to manage deadlock, which take failures of process modules into consideration.

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Semiconductor Manufacturing, IEEE Transactions on  (Volume:17 ,  Issue: 1 )