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High-speed CMOS I/O buffer circuits

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7 Author(s)
Ishibe, M. ; Toshiba Corp., Kawasaki, Japan ; Otaka, S. ; Takeda, J. ; Tanaka, S.
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Very high-speed off-chip data rates have been difficult to achieve in CMOS technologies. An all-CMOS set of I/O buffer circuits, which use current-mode and impedance matching techniques, capable of transmitting off-chip at 1-Gb/s data rates is described. The circuits are also compatible with voltage-mode signal levels for ECL input and MOS output circuits

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:27 ,  Issue: 4 )