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Coulomb blockade has been widely reported in silicon and metallic structures without intentional tunnel barriers. In particular, a simple constriction in silicon-on-insulator (SOI) allows to build a three-terminal silicon single-electron transistor (SET) operating at moderate temperature. The key parameters are the access resistances confining the electrons and the size of the gate-channel overlap, which sets the Coulomb energy. Thin films of doped silicon with sheet resistance of a few tens of h/e2 are well suited for fabricating optimized access resistances. Low doped extensions with typical resistivity 1000 Ωμm (at 300 K) are also good candidates. We illustrate this MOS-SET principle in SOI constriction and standard MOSFET of similar size. Although relying on different concepts, the ultimate MOSFET and MOS-SET are shown to be technologically close, differing mostly by the ratio between the channel resistance over the access resistance. Because this ratio is decreasing as the gate length shrinks, single electron effects should become more and more important at high temperature in the subthreshold regime of standard field effect transistor devices.