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In light of increasing interest in the development of double gate (DG) CMOS technology that extends the device scaling limit, the relative merit of symmetric versus asymmetry DG-MOSFETs is studied using the quantum corrected Monte Carlo (MC) method. A recently developed Bohm-based quantum correction model is applied to the MC simulation of DG-MOSFETs. The drain current is first studied as the thickness of the silicon layer is scaled. Then results of the charge density and potential for asymmetric and symmetric devices under the same bias conditions are compared. Also analyzed is how the drain induced barrier lowering is affected by the channel length.