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Twin-bit silicon-oxide-nitride-oxide-silicon (SONOS) memory by inverted sidewall patterning (TSM-ISP)

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5 Author(s)
Yong Kyu Lee ; Interuniversity Semicond. Res. Center, Seoul Nat. Univ., South Korea ; Kim, Tae-Hun ; Sang Hoon Lee ; Lee, Jong Duk
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We have proposed a new twin-bit silicon-oxide-nitride-oxide-silicon memory (TSM)-inverted sidewall patterning (ISP) cell which has twin oxide-nitride-oxides (ONOs) physically separated by the ISP method under one control gate. This TSM-ISP can control the trapped charge distribution and make diffusion barrier of charges, so that program/erase (P/E) endurance and retention can be increased. The trapping nitride is narrow enough to reduce hot-hole erase times. To estimate the new device characteristics, we have devised a special simulation method of silicon-oxide-nitride-oxide-silicon (SONOS) by implementing a simple idea in the conventional device simulator, "MEDICI." By placing the floating nodes in nitride with adjusted density, which is supposed to play the role of charge traps in nitride, we can estimate not only the conventional SONOS characteristics, but also the new SONOS characteristics, such as TSM-ISP.

Published in:

Nanotechnology, IEEE Transactions on  (Volume:2 ,  Issue: 4 )

Date of Publication:

Dec. 2003

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