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Comparison of NMOS and PMOS transistor sensitivity to SEU in SRAMs by device simulation

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7 Author(s)

The off-NMOS and off-PMOS transistor single-event upset (SEU) sensitivities are studied in a 0.6-μm SRAM. In some cases, the off-PMOS sensitivity is shown to be similar to the off-NMOS one. This could affect SEU rate calculations.

Published in:

IEEE Transactions on Nuclear Science  (Volume:50 ,  Issue: 6 )